DEMO9RS08KA8【PDF 1/42 页】BOARD DEMO FOR MC9RS08KA8

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Freescale Semiconductor

Data Sheet: Technical Data

Document Number: MC9RS08KA8

Rev. 4, 6/2009

MC9RS08KA8

20-Pin W-SOIC

16-Pin W-SOIC

MC9RS08KA8 Series

TBD

Case 751D

20-Pin PDIP

TBD

Case 751G

16-Pin PDIP

Covers: MC9RS08KA8

MC9RS08KA4

Features:

TBD

Case 738C

16-Pin TSSOP

Case 948F

TBD

Case 648

? 8-Bit RS08 Central Processor Unit (CPU)

– Up to 20 MHz CPU at 1.8 V to 5.5 V across temperature

range of –40°C to 85°C

– Subset of HC08 instruction set with added BGND

instruction

? On-Chip Memory

– 8 KB flash read/program/erase over full operating

voltage and temperature; KA4 has 4 KB flash

– 254 byte random-access memory (RAM); KA4 has 126

byte RAM

– Security circuitry to prevent unauthorized access to

RAM and flash contents

? Power-Saving Modes

– Wait and stop

– Wakeup from power-saving modes using real-time

interrupt (RTI), KBI, or ACMP

? Clock Source Options

– Oscillator (XOSC) — Loop-Control Pierce oscillator;

crystal or ceramic resonator range of 31.25 kHz to

39.0625 kHz or 1 MHz to 5 MHz

– Internal Clock Source (ICS) — Internal clock source

module containing a frequency-locked-loop (FLL)

controlled by internal or external reference; precision

trimming of internal reference allows 0.2% resolution

and 2% deviation over temperature and voltage;

supports bus frequencies up to 10 MHz

? System Protection

– Watchdog computer operating properly (COP) reset

with option to run from dedicated 1 kHz internal clock

source or bus clock

– Low-Voltage detection with reset or interrupt

– Single-Wire background debug interface

– Breakpoint capability to allow single breakpoint setting

during in-circuit debugging

? Peripherals

– ADC — 12-channel, 10-bit resolution; 2.5 μ s

conversion time; automatic compare function; operation

in stop; fully functional from 2.7 V to 5.5 V (8-channels

available on 16-pin package)

– TPM — One 2-channel; selectable input capture, output

compare, or buffered edge- or center-aligned PWM on

each channel

– IIC — Inter-Integrated circuit bus module capable of

operation up to 100 kbps with maximum bus loading;

capable of higher baudrates with reduced loading

– MTIM1 and MTIM2 — Two 8-bit modulo timers

– KBI — Keyboard interrupts with rising or falling edge

detect; eight KBI ports in 16-pin and 20-pin packages

– ACMP — Analog comparator: full rail-to-rail supply

operation; option to compare to fixed internal bandgap

reference voltage; can operate in stop mode

? Input/Output

– 14/18 GPIOs including one output only pin and one

input only pin

– Hysteresis and configurable pullup device on all input

pins; configurable slew rate and drive strength on all

output pins

? Package Options

– 16-pin SOIC, PDIP or TSSOP

– 20-pin SOIC or PDIP

– Illegal opcode detection with reset

– Illegal address detection with reset

– Flash block protection

? Development Support

This document contains information on a product under development. Freescale reserves the

right to change or discontinue this product without notice.

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